Neural Semiconductor Limited
Neural Semiconductor, a concern of DBL Group, is dedicated to provide full package of SoC Design Services. We have established a VLSI Design Center based in Dhaka, Bangladesh. A marketing and customer interface office is maintained in the USA, India, Japan and China. We provide ASIC Design Service & Software Development Service with highly professional design and sales team.
I started my professional career as a Design Engineer at Neural Semiconductor. I got training from Cadence (India) both on digital and analog design. I worked for a long time in AMS (analog and mixed signal) design team. I have successfully completed four projects while in the AMS team, which included spice level modeling and simulation of analog circuits and custom layout design along with IP block designs.
Projects
1.MEMS Capacitive Microphone readout interface design
In MEMS capacitive microphone, variation in sound pressure is converted into variable capacitance. We had to design a circuit to use this variable capacitance to ultimately send a digital signal to the processor IC. In summary, the variable capacitance was converted into a variable voltage signal. This signal was pre-amplified using a complex pre-amplifier block so as not to distort the original signal and limit noise as low as possible. A 3rd order Sigma Delta Modulator was designed and used to digitize the amplified signal along with a feedback circuit to enhance the linearity. This digital signal was then sent to the digital IC block.
2.PLL block for internal use (IP)
Phase locked loop is an important block because it generates the clock signal for other blocks. Our designed PLL consists of phase detector, charge pump, loop filter, VCO and frequency divider blocks. It could deliver frequencies from kHz to GHz range. We designed a full custom layout of the PLL (90nm process) and used it with other library blocks during floorplan, placement and routing.
3.SPICE modeling of specific NMOS/PMOS IC
A prominent Japanese company needed to design the SPICE modeling of some NMOS and PMOS ICs. We used BSIM level 54 equations and parameters to design the required SPICE models for them. All DC, AC and thermal characteristics of the IC from the datasheet and from the SPICE model output was in very close agreement.
4.SPICE modeling of some diodes and BJTs
This project was similar to the previous one, we had to make SPICE models of some diode and BJT ICs so that the model generates similar AC, DC and thermal characteristics as the datasheet. BSIM level 7 and level 54 equations and parameters were used for the diodes and BJTs respectively.
University of Asia Pacific
University of Asia Pacific is a leading private university in Bangladesh. Its mission is to offer best possible education to young generation. It continues to develop a sustained culture of ascending to a top-tier of vibrant academic environment, maintain and foster well qualified faculty, provide adequate research support for cutting-edge research in-house and in collaboration national and international peers, update curricula to keep up with advancing trend in science and technology, use state-of-the-art best practices in teaching-learning and modern facilities in laboratories and libraries, and provide other supports in aid to students becoming competent graduates with their potential fully realized and personality well developed for joining the global forces in making the future of society in changing world.
I joined the University of Asia Pacific as a lecturer in October 2018. My primaries duties include, but not limited to, taking classes, help students develop their skills, assessing students' performance etc.